The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available.

  - An issue was discovered in Xen through 4.14.x. The PCI passthrough code improperly uses register data.
    Code paths in Xen's MSI handling have been identified that act on unsanitized values read back from device     hardware registers. While devices strictly compliant with PCI specifications shouldn't be able to affect     these registers, experience shows that it's very common for devices to have out-of-spec backdoor     operations that can affect the result of these reads. A not fully trusted guest may be able to crash Xen,     leading to a Denial of Service (DoS) for the entire system. Privilege escalation and information leaks     cannot be excluded. All versions of Xen supporting PCI passthrough are affected. Only x86 systems are     vulnerable. Arm systems are not vulnerable. Only guests with passed through PCI devices may be able to     leverage the vulnerability. Only systems passing through devices with out-of-spec (backdoor)     functionality can cause issues. Experience shows that such out-of-spec functionality is common; unless you     have reason to believe that your device does not have such functionality, it's better to assume that it     does. (CVE-2020-25595)

Note that Nessus relies on the presence of the package as reported by the vendor.

This update for xen fixes the following issues :

CVE-2020-25604: Fixed a race condition when migrating timers between x86 HVM vCPU-s (bsc#1176343,XSA-336)

CVE-2020-25595: Fixed an issue where PCI passthrough code was reading back hardware registers (bsc#1176344,XSA-337)

CVE-2020-25597: Fixed an issue where a valid event channels may not turn invalid (bsc#1176346,XSA-338)

CVE-2020-25596: Fixed a potential denial of service in x86 pv guest kernel via SYSENTER (bsc#1176345,XSA-339)

CVE-2020-25603: Fixed an issue due to missing barriers when accessing/allocating an event channel (bsc#1176347,XSA-340)

CVE-2020-25600: Fixed out of bounds event channels available to 32-bit x86 domains (bsc#1176348,XSA-342)

CVE-2020-25599: Fixed race conditions with evtchn_reset() (bsc#1176349,XSA-343)

CVE-2020-25601: Fixed an issue due to lack of preemption in evtchn_reset() / evtchn_destroy() (bsc#1176350,XSA-344)

CVE-2020-14364: Fixed an out-of-bounds read/write access while processing usb packets (bsc#1175534).

Various bug fixes (bsc#1027519)

Note that Tenable Network Security has extracted the preceding description block directly from the SUSE security advisory. Tenable has attempted to automatically clean and format it as much as possible without introducing additional issues.

The remote SUSE Linux SLES11 host has packages installed that are affected by multiple vulnerabilities as referenced in the SUSE-SU-2020:14521-1 advisory.

  - Incomplete cleanup from specific special register read operations in some Intel(R) Processors may allow an     authenticated user to potentially enable information disclosure via local access. (CVE-2020-0543)

  - An out-of-bounds read/write access flaw was found in the USB emulator of the QEMU in versions before     5.2.0. This issue occurs while processing USB packets from a guest when USBDevice 'setup_len' exceeds its     'data_buf[4096]' in the do_token_in, do_token_out routines. This flaw allows a guest user to crash the     QEMU process, resulting in a denial of service, or the potential execution of arbitrary code with the     privileges of the QEMU process on the host. (CVE-2020-14364)

  - An issue was discovered in Xen through 4.13.x, allowing x86 Intel HVM guest OS users to cause a host OS     denial of service or possibly gain privileges because of insufficient cache write-back under VT-d. When     page tables are shared between IOMMU and CPU, changes to them require flushing of both TLBs. Furthermore,     IOMMUs may be non-coherent, and hence prior to flushing IOMMU TLBs, a CPU cache also needs writing back to     memory after changes were made. Such writing back of cached data was missing in particular when splitting     large page mappings into smaller granularity ones. A malicious guest may be able to retain read/write DMA     access to frames returned to Xen's free pool, and later reused for another purpose. Host crashes (leading     to a Denial of Service) and privilege escalation cannot be ruled out. Xen versions from at least 3.2     onwards are affected. Only x86 Intel systems are affected. x86 AMD as well as Arm systems are not     affected. Only x86 HVM guests using hardware assisted paging (HAP), having a passed through PCI device     assigned, and having page table sharing enabled can leverage the vulnerability. Note that page table     sharing will be enabled (by default) only if Xen considers IOMMU and CPU large page size support     compatible. (CVE-2020-15565)

  - An issue was discovered in Xen through 4.13.x, allowing Intel guest OS users to gain privileges or cause a     denial of service because of non-atomic modification of a live EPT PTE. When mapping guest EPT (nested     paging) tables, Xen would in some circumstances use a series of non-atomic bitfield writes. Depending on     the compiler version and optimisation flags, Xen might expose a dangerous partially written PTE to the     hardware, which an attacker might be able to race to exploit. A guest administrator or perhaps even an     unprivileged guest user might be able to cause denial of service, data corruption, or privilege     escalation. Only systems using Intel CPUs are vulnerable. Systems using AMD CPUs, and Arm systems, are not     vulnerable. Only systems using nested paging (hap, aka nested paging, aka in this case Intel EPT) are     vulnerable. Only HVM and PVH guests can exploit the vulnerability. The presence and scope of the     vulnerability depends on the precise optimisations performed by the compiler used to build Xen. If the     compiler generates (a) a single 64-bit write, or (b) a series of read-modify-write operations in the same     order as the source code, the hypervisor is not vulnerable. For example, in one test build using GCC 8.3     with normal settings, the compiler generated multiple (unlocked) read-modify-write operations in source-     code order, which did not constitute a vulnerability. We have not been able to survey compilers;
    consequently we cannot say which compiler(s) might produce vulnerable code (with which code-generation     options). The source code clearly violates the C rules, and thus should be considered vulnerable.
    (CVE-2020-15567)

  - An issue was discovered in Xen through 4.14.x. The PCI passthrough code improperly uses register data.
    Code paths in Xen's MSI handling have been identified that act on unsanitized values read back from device     hardware registers. While devices strictly compliant with PCI specifications shouldn't be able to affect     these registers, experience shows that it's very common for devices to have out-of-spec backdoor     operations that can affect the result of these reads. A not fully trusted guest may be able to crash Xen,     leading to a Denial of Service (DoS) for the entire system. Privilege escalation and information leaks     cannot be excluded. All versions of Xen supporting PCI passthrough are affected. Only x86 systems are     vulnerable. Arm systems are not vulnerable. Only guests with passed through PCI devices may be able to     leverage the vulnerability. Only systems passing through devices with out-of-spec (backdoor)     functionality can cause issues. Experience shows that such out-of-spec functionality is common; unless you     have reason to believe that your device does not have such functionality, it's better to assume that it     does. (CVE-2020-25595)

  - An issue was discovered in Xen through 4.14.x. x86 PV guest kernels can experience denial of service via     SYSENTER. The SYSENTER instruction leaves various state sanitization activities to software. One of Xen's     sanitization paths injects a #GP fault, and incorrectly delivers it twice to the guest. This causes the     guest kernel to observe a kernel-privilege #GP fault (typically fatal) rather than a user-privilege #GP     fault (usually converted into SIGSEGV/etc.). Malicious or buggy userspace can crash the guest kernel,     resulting in a VM Denial of Service. All versions of Xen from 3.2 onwards are vulnerable. Only x86 systems     are vulnerable. ARM platforms are not vulnerable. Only x86 systems that support the SYSENTER instruction     in 64bit mode are vulnerable. This is believed to be Intel, Centaur, and Shanghai CPUs. AMD and Hygon CPUs     are not believed to be vulnerable. Only x86 PV guests can exploit the vulnerability. x86 PVH / HVM guests     cannot exploit the vulnerability. (CVE-2020-25596)

  - An issue was discovered in Xen through 4.14.x. There is mishandling of the constraint that once-valid     event channels may not turn invalid. Logic in the handling of event channel operations in Xen assumes that     an event channel, once valid, will not become invalid over the life time of a guest. However, operations     like the resetting of all event channels may involve decreasing one of the bounds checked when determining     validity. This may lead to bug checks triggering, crashing the host. An unprivileged guest may be able to     crash Xen, leading to a Denial of Service (DoS) for the entire system. All Xen versions from 4.4 onwards     are vulnerable. Xen versions 4.3 and earlier are not vulnerable. Only systems with untrusted guests     permitted to create more than the default number of event channels are vulnerable. This number depends on     the architecture and type of guest. For 32-bit x86 PV guests, this is 1023; for 64-bit x86 PV guests, and     for all ARM guests, this number is 4095. Systems where untrusted guests are limited to fewer than this     number are not vulnerable. Note that xl and libxl limit max_event_channels to 1023 by default, so systems     using exclusively xl, libvirt+libxl, or their own toolstack based on libxl, and not explicitly setting     max_event_channels, are not vulnerable. (CVE-2020-25597)

  - An issue was discovered in Xen through 4.14.x. Out of bounds event channels are available to 32-bit x86     domains. The so called 2-level event channel model imposes different limits on the number of usable event     channels for 32-bit x86 domains vs 64-bit or Arm (either bitness) ones. 32-bit x86 domains can use only     1023 channels, due to limited space in their shared (between guest and Xen) information structure, whereas     all other domains can use up to 4095 in this model. The recording of the respective limit during domain     initialization, however, has occurred at a time where domains are still deemed to be 64-bit ones, prior to     actually honoring respective domain properties. At the point domains get recognized as 32-bit ones, the     limit didn't get updated accordingly. Due to this misbehavior in Xen, 32-bit domains (including Domain 0)     servicing other domains may observe event channel allocations to succeed when they should really fail.
    Subsequent use of such event channels would then possibly lead to corruption of other parts of the shared     info structure. An unprivileged guest may cause another domain, in particular Domain 0, to misbehave. This     may lead to a Denial of Service (DoS) for the entire system. All Xen versions from 4.4 onwards are     vulnerable. Xen versions 4.3 and earlier are not vulnerable. Only x86 32-bit domains servicing other     domains are vulnerable. Arm systems, as well as x86 64-bit domains, are not vulnerable. (CVE-2020-25600)

  - An issue was discovered in Xen through 4.14.x. There is a lack of preemption in evtchn_reset() /     evtchn_destroy(). In particular, the FIFO event channel model allows guests to have a large number of     event channels active at a time. Closing all of these (when resetting all event channels or when cleaning     up after the guest) may take extended periods of time. So far, there was no arrangement for preemption at     suitable intervals, allowing a CPU to spend an almost unbounded amount of time in the processing of these     operations. Malicious or buggy guest kernels can mount a Denial of Service (DoS) attack affecting the     entire system. All Xen versions are vulnerable in principle. Whether versions 4.3 and older are vulnerable     depends on underlying hardware characteristics. (CVE-2020-25601)

  - An issue was discovered in Xen through 4.14.x. There are missing memory barriers when accessing/allocating     an event channel. Event channels control structures can be accessed lockless as long as the port is     considered to be valid. Such a sequence is missing an appropriate memory barrier (e.g., smp_*mb()) to     prevent both the compiler and CPU from re-ordering access. A malicious guest may be able to cause a     hypervisor crash resulting in a Denial of Service (DoS). Information leak and privilege escalation cannot     be excluded. Systems running all versions of Xen are affected. Whether a system is vulnerable will depend     on the CPU and compiler used to build Xen. For all systems, the presence and the scope of the     vulnerability depend on the precise re-ordering performed by the compiler used to build Xen. We have not     been able to survey compilers; consequently we cannot say which compiler(s) might produce vulnerable code     (with which code generation options). GCC documentation clearly suggests that re-ordering is possible. Arm     systems will also be vulnerable if the CPU is able to re-order memory access. Please consult your CPU     vendor. x86 systems are only vulnerable if a compiler performs re-ordering. (CVE-2020-25603)

  - An issue was discovered in Xen through 4.14.x. There is a race condition when migrating timers between x86     HVM vCPUs. When migrating timers of x86 HVM guests between its vCPUs, the locking model used allows for a     second vCPU of the same guest (also operating on the timers) to release a lock that it didn't acquire. The     most likely effect of the issue is a hang or crash of the hypervisor, i.e., a Denial of Service (DoS). All     versions of Xen are affected. Only x86 systems are vulnerable. Arm systems are not vulnerable. Only x86     HVM guests can leverage the vulnerability. x86 PV and PVH cannot leverage the vulnerability. Only guests     with more than one vCPU can exploit the vulnerability. (CVE-2020-25604)

Note that Nessus has not tested for this issue but has instead relied only on the application's self-reported version number.

ID	Name	Product	Family	Published	Updated	Severity
259624	Linux Distros Unpatched Vulnerability : CVE-2020-25595	Nessus	Misc.	8/30/2025	7/29/2026	high
143873	SUSE SLES12 Security Update : xen (SUSE-SU-2020:2787-1)	Nessus	SuSE Local Security Checks	12/9/2020	5/11/2022	high
150542	SUSE SLES11 Security Update : xen (SUSE-SU-2020:14521-1)	Nessus	SuSE Local Security Checks	6/10/2021	5/9/2022	high

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